CoPoS（芯片-面板-基板封装）作为新一代面板级先进封装技术，正在成为解决现有封装方案瓶颈的突破口[1]。7月18日，燧原科技与先封科技联合发布了国内首款基于该技术的AI芯片样品[1]。这一技术创新旨在克服现有CoWoS方案存在的成本高、尺寸受限和翘曲风险等问题[1]。
CoPoS通过将圆形硅晶圆替换为方形面板，在面积利用率上实现显著提升[1]。相比圆形晶圆约70%的利用率，方形面板可达95%以上，同时单位面积成本可降低20%-30%[1]。考虑到市场需求的快速增长——2026年CoWoS需求约138万片晶圆，2027年将激增至超268万片[1]——这一成本优化对产业具有重要意义。
在产业推进方面，台积电已搭建试点试验线[1]。根据其规划，该公司将于2026年6月完成嘉义AP7厂区，2027年下半年启用510×515mm量产规格面板，2028年下半年进入量产阶段[1]。产能方面，台积电计划2028年月产不低于500 Panel，2029年月产1.2万Panel，2030年月产3万Panel，2031年月产5.3万Panel[1]。台积电董事长魏哲家表示，CoPoS技术难度显著高于CoWoS[1]。
燧原科技声称其CoPoS方案比台积电公布的同路线量产时间表提前至少两个季度[1]。英伟达预计将成为CoPoS首发客户，其Feynman Ultra版本在2029年推出时将全面落地该封装技术[1]。不过，摩根士丹利的分析指出风险因素：若2027年面板良率无法突破85%的门槛，量产时间表可能被迫推迟[1]。
Chip-on-Panel-on-Substrate (CoPoS), a next-generation panel-level advanced packaging technology, is poised to reshape the AI chip manufacturing landscape by addressing critical limitations of existing solutions. On July 18, Enflame Technology and XianFeng Semiconductor unveiled China's first AI chip sample based on CoPoS technology, while Taiwan Semiconductor Manufacturing Company (TSMC) has established pilot production lines with plans for trial production in 2027 and mass production in the second half of 2028. [1]
CoPoS technology replaces circular silicon wafers with square panels, dramatically improving manufacturing efficiency and cost-effectiveness. [1] The innovation boosts area utilization from approximately 70% with round wafers to over 95% with rectangular panels, while reducing per-unit area costs by 20% to 30%. [1] According to industry projections, CoWoS demand will reach approximately 1.38 million wafers in 2026, surging to over 2.68 million wafers in 2027, creating urgent need for alternative packaging solutions. [1]
TSMC's production roadmap reveals aggressive capacity expansion: the company aims to complete its Chiayi AP7 facility by June 2026 and begin volume production with 510×515mm panel specifications in the second half of 2027, with monthly output targets of at least 500 panels in 2028, scaling to 1.2 million panels monthly by 2029, 3 million by 2030, and 5.3 million by 2031. [1] Enflame Technology claims its CoPoS implementation will reach mass production at least two quarters ahead of TSMC's publicly announced timeline. [1] TSMC Chairman Wei Zhejia acknowledged that CoPoS technology presents significantly greater technical challenges than CoWoS. [1]
NVIDIA is expected to become the first major customer for CoPoS-packaged chips, with its Feynman Ultra version anticipated to fully integrate the technology upon launch in 2029. [1] However, Morgan Stanley analysts have flagged a critical risk: if panel yield rates fail to surpass 85% by 2027, mass production schedules may face forced delays. [1]
