1995年，硅图公司(SGI)的John Mashey在Usenet的comp.arch讨论组发表了关于128位处理器发展前景的技术分析1。Mashey基于DRAM容量增长规律进行推演，指出动态随机存储器每3年增长4倍，或每3年物理地址位宽增长2比特1。
按照这一增长规律，Mashey预测64位向128位处理器的转变窗口将跨越1995年至2043年，历时约48年1。他同时提出基于虚拟内存压力的另一估计，认为大规模采用128位芯片可能在2020年左右出现1。Mashey指出这一过渡周期应为32位到64位周期的2倍1，转变过程遵循指数级而非线性的时间规律1。
在技术层面，当时已有36位和40位物理地址的芯片问世1。Mashey也指出，128位处理器的实现需要克服1024位宽总线、长线延迟等物理设计挑战1。
In a technical discussion posted to Usenet in 1995, John Mashey of Silicon Graphics outlined his predictions for the transition from 64-bit to 128-bit processors.1 Mashey based his analysis on the observed growth rate of DRAM capacity, which increases by two bits of physical address every three years, translating to a fourfold increase in total capacity over the same period.1 Using this metric, he estimated that widespread adoption of 128-bit chips would likely occur sometime between 2020 and 2043, with an alternative estimate centered around 2020 based on virtual memory pressure.1
Mashey's methodology drew parallels to previous processor architecture transitions, proposing that the shift from 64-bit to 128-bit systems should take approximately twice as long as the transition from 32-bit to 64-bit processors.1 He noted that processors with 36-bit and 40-bit physical address spaces had already begun appearing at the time of his analysis.1 Beyond the timeline projections, Mashey also identified significant physical design challenges that would need to be overcome, including the demands of implementing 1024-bit-wide buses and managing long-line delay issues in processor architecture.1
评论
还没有评论，欢迎留下第一条。