有研究通过Geekbench 7基准测试深入分析了Windows 11的Prism二进制翻译器在ARM处理器上运行x86-64应用的性能表现1。研究对比了Snapdragon X2 Elite、Neoverse N1和N2等不同ARM核心的表现，揭示了二进制翻译带来的系统性开销1。
指令膨胀与性能损失
二进制翻译过程中存在显著的指令膨胀问题1。x86-64指令通常会转换为两倍数量的aarch64指令，其中AVX 256位向量指令必须映射到NEON 128位指令1。以Video Player工作负载为例，原本的17指令循环被翻译为69指令序列1。这种转换导致Geekbench 7各工作负载在Snapdragon X2 Elite上遭受"数代性能损失"1。
高性能核心的优势与优化空间
尽管存在这些挑战，高性能的ARM核心设计能够通过更宽的执行宽度和更大的乱序执行引擎部分吸收这些开销1。研究发现，Qualcomm E-Core即使在二进制翻译下也超越了Neoverse N1性能1。此外，Prism通过在XtaCache目录缓存转换代码以避免重复翻译1，但研究指出该翻译器仍存在优化不足之处，使用了不必要的寄存器溢出和冗余标志生成1。
A comprehensive analysis of Windows 11's Prism binary translator has revealed substantial performance penalties when executing x86-64 applications on ARM-based processors.1 The research employed Geekbench 7 benchmarks to compare instruction efficiency, performance, and power consumption across different ARM cores, including Snapdragon X2 Elite, Neoverse N1, and N2 architectures.1
The study found that binary translation fundamentally inflates code size, with x86-64 instructions typically converting to approximately twice the number of ARM aarch64 instructions.1 A notable case involved the Video Player workload, where a 17-instruction loop expanded to a 69-instruction sequence after translation.1 This expansion becomes particularly acute when handling vector operations, as AVX 256-bit instructions must map to NEON's narrower 128-bit format, compounding the instruction growth.1 Across Geekbench 7 workloads, the Snapdragon X2 Elite experienced what researchers characterized as "multiple generations of performance loss" due to this translation overhead.1
Despite these challenges, the analysis demonstrated that high-performance ARM core designs partially mitigate the translation burden through architectural advantages.1 Qualcomm's E-Core performance under binary translation exceeded that of Neoverse N1 cores, suggesting that wider execution pipelines and larger out-of-order execution engines can absorb some of the additional instruction overhead.1 Prism addresses repeated translation costs by caching converted code in an XtaCache directory, avoiding redundant retranslation.1 However, the translator leaves optimization opportunities unrealized, generating unnecessary register spills and redundant flag calculations that contribute to further performance degradation.1
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